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84 lines
3.6 KiB
Diff
84 lines
3.6 KiB
Diff
From 1fb710793ce2619223adffaf981b1ff13cd48f17 Mon Sep 17 00:00:00 2001
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From: Mario Limonciello <mario.limonciello@amd.com>
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Date: Thu, 18 Sep 2025 19:48:00 -0500
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Subject: [PATCH] drm/amdgpu: Enable MES lr_compute_wa by default
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The MES set resources packet has an optional bit 'lr_compute_wa'
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which can be used for preventing MES hangs on long compute jobs.
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Set this bit by default.
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Co-developed-by: Yifan Zhang <yifan1.zhang@amd.com>
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Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
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Acked-by: Alex Deucher <alexander.deucher@amd.com>
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Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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---
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drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 6 ++++++
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drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 5 +++++
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drivers/gpu/drm/amd/include/mes_v11_api_def.h | 3 ++-
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drivers/gpu/drm/amd/include/mes_v12_api_def.h | 3 ++-
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4 files changed, 15 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
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index 3b91ea601add41..e82188431f7969 100644
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--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
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+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
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@@ -713,6 +713,12 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)
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mes_set_hw_res_pkt.enable_reg_active_poll = 1;
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mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
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mes_set_hw_res_pkt.oversubscription_timer = 50;
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+ if ((mes->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x7f)
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+ mes_set_hw_res_pkt.enable_lr_compute_wa = 1;
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+ else
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+ dev_info_once(mes->adev->dev,
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+ "MES FW version must be >= 0x7f to enable LR compute workaround.\n");
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+
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if (amdgpu_mes_log_enable) {
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mes_set_hw_res_pkt.enable_mes_event_int_logging = 1;
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mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr =
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diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
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index 998893dff08e93..aff06f06aeeecf 100644
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--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
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+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
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@@ -769,6 +769,11 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes, int pipe)
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mes_set_hw_res_pkt.use_different_vmid_compute = 1;
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mes_set_hw_res_pkt.enable_reg_active_poll = 1;
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mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
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+ if ((mes->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x82)
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+ mes_set_hw_res_pkt.enable_lr_compute_wa = 1;
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+ else
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+ dev_info_once(adev->dev,
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+ "MES FW version must be >= 0x82 to enable LR compute workaround.\n");
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/*
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* Keep oversubscribe timer for sdma . When we have unmapped doorbell
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diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
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index 15680c3f49704e..ab1cfc92dbeb1b 100644
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--- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
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+++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
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@@ -238,7 +238,8 @@ union MESAPI_SET_HW_RESOURCES {
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uint32_t enable_mes_sch_stb_log : 1;
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uint32_t limit_single_process : 1;
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uint32_t is_strix_tmz_wa_enabled :1;
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- uint32_t reserved : 13;
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+ uint32_t enable_lr_compute_wa : 1;
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+ uint32_t reserved : 12;
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};
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uint32_t uint32_t_all;
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};
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diff --git a/drivers/gpu/drm/amd/include/mes_v12_api_def.h b/drivers/gpu/drm/amd/include/mes_v12_api_def.h
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index c04bd351b2505d..69611c7e30e355 100644
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--- a/drivers/gpu/drm/amd/include/mes_v12_api_def.h
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+++ b/drivers/gpu/drm/amd/include/mes_v12_api_def.h
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@@ -287,7 +287,8 @@ union MESAPI_SET_HW_RESOURCES {
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uint32_t limit_single_process : 1;
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uint32_t unmapped_doorbell_handling: 2;
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uint32_t enable_mes_fence_int: 1;
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- uint32_t reserved : 10;
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+ uint32_t enable_lr_compute_wa : 1;
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+ uint32_t reserved : 9;
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};
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uint32_t uint32_all;
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};
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